Many high-speed, chip-to-chip electrical input/output (I/O) interconnects are implemented as differential links. As data rates reach beyond multiple Gb/s (gigabits per second), intra-pair skew, i.e., time of flight differences between signals on one or more pairs of wires that constitute the differential link, may limit the achievable bit-error rate. Intra-pair skew may be associated with mismatches in passive components and/or active devices, as well as wire parasitics. Intra-pair skew may result in received signals that are not truly differential and may reduce a receiver's timing margin.
Intra-pair skew may also pose limits on promising I/O technologies, such as simultaneous common-mode signaling over wires carrying differential data streams (also referred to as phantom signaling). In systems that utilize this type of common-mode signaling, virtual differential signals are created by modulating the common modes of two different differential pairs in a differential manner. Intra-pair skew between signals on a first pair of wires A and A′ and/or between signals on a second pair of wires B and B′, however, may affect differential signals associated with the difference of signals on the first pair of wires (A-A′) and/or the second pair of wires (B-B′). In addition, differences in the average delays of signals on the first pair of wires and/or the second pair of wires may affect the common-mode signals. Existing extraction circuits for the common-mode signals may be sensitive to such effects and may, therefore, compound the challenge posed by intra-pair skew.
Furthermore, existing approaches for adjusting a phase of a sampling clock at a receiver on a pair-of-wire basis may not be effective in reducing the effects of intra-pair skew. Even if the phase of the sampling clock at the receiver is adjusted on a per-wire basis it may not be effective in reducing the effects of intra-pair skew, since such adjustments may not render received signals differential. As a consequence, there is a need for improved devices, systems and methods to address intra-pair skew and improved common-mode signaling.
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